NXP Semiconductors PTN3360ABS HDMI / DVI Level Shifter
NXP Semiconductors PTN3360ABS HDMI / DVI level shifter with inverting HPD converts four lanes of low-swing AC-coupled differential output signals to DVI v1.0. This level shifter also converts HDMI v1.3a compliant open-drain current-steering differential output signals, up to 2.5Gbit/s per lane. The PTN3360ABS level shifter lane provides a level-shifting differential buffer to translate from low-swing AC-coupled differential signaling on the source side to TMDS-type DC-coupled differential current-mode signaling terminated into 50Ω to 3.3V on the sink side. The PTN3360ABS HDMI / DVI level shifter also provides a single-ended active buffer for voltage translation of the HPD signal from 5V on the sink side to 1.1V on the source side and provides a channel for level shifting of the DDC channel between 3.3V source-side and 5V sink-side. The DDC channel is implemented using pass-gate technology providing level shifting as well as disablement of the clock and data lines.
Features
- High-speed TMDS level shifting
- Converts four lanes of low-swing AC-coupled differential input signals to DVI v1.0 and HDMI v1.3a compliant open-drain current-steering differential output signals
- DDC level shifting
- Integrated DDC level shifting (3.3V source to 5V sink side)
- 0Hz to 400kHz I2C-bus clock frequency
- Back-power safe sink-side terminals
- HPD level shifting
- 0V on the sink side to 1.1V on the source side, or from 5V on the sink side to 0V on the source side
- integrated 200kΩ pull-down resistor on HPD sink
- Power supply 3.3V±10
- ESD resilience to 8kV HBM and 500V CDM
- Power-saving modes (using output enable)
- Back-current-safe design on all sink-side main link, DDC, and HPD terminals
- Transparent operation: no re-timing or software configuration required
PTN3360ABS Block Diagram
Published: 2009-05-26
| Updated: 2022-03-11